OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	10/21/2025 06:55:16 AM	rwxr-xr-x
📄 acc_prof.h	7.28 KB	02/12/2025 01:07:07 PM	rw-r--r--
📄 adxintrin.h	2.77 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 ammintrin.h	3.14 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 amxbf16intrin.h	1.75 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 amxint8intrin.h	2.04 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 amxtileintrin.h	3.02 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx2intrin.h	57.37 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 avx5124fmapsintrin.h	6.38 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx5124vnniwintrin.h	4.16 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512bf16intrin.h	3.85 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512bf16vlintrin.h	6 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512bitalgintrin.h	8.64 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512bwintrin.h	100.03 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512cdintrin.h	5.69 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512dqintrin.h	90.67 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512erintrin.h	17.26 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512fintrin.h	512.62 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 avx512ifmaintrin.h	3.35 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512ifmavlintrin.h	5.26 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512pfintrin.h	10.05 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512vbmi2intrin.h	19.35 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512vbmi2vlintrin.h	36.25 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512vbmiintrin.h	4.81 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512vbmivlintrin.h	8.17 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512vlbwintrin.h	142.35 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512vldqintrin.h	59.88 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512vlintrin.h	418.84 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512vnniintrin.h	4.85 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512vnnivlintrin.h	7.23 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512vp2intersectintrin.h	2.06 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512vp2intersectvlintrin.h	2.58 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512vpopcntdqintrin.h	3.04 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avx512vpopcntdqvlintrin.h	4.56 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 avxintrin.h	51.83 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 avxvnniintrin.h	3.52 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 bmi2intrin.h	3.28 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 bmiintrin.h	5.46 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 bmmintrin.h	1.13 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 cet.h	2.6 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 cetintrin.h	3.26 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 cldemoteintrin.h	1.58 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 clflushoptintrin.h	1.63 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 clwbintrin.h	1.55 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 clzerointrin.h	1.46 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 cpuid.h	9.62 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 cross-stdarg.h	2.5 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 emmintrin.h	50.93 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 enqcmdintrin.h	1.77 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 f16cintrin.h	3.33 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 float.h	20.17 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 fma4intrin.h	8.92 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 fmaintrin.h	9.88 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 fxsrintrin.h	2.01 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 gcov.h	1.21 KB	02/12/2025 01:06:55 PM	rw-r--r--
📄 gfniintrin.h	14.7 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 hresetintrin.h	1.59 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 ia32intrin.h	7.68 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 immintrin.h	2.47 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 iso646.h	1.24 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 keylockerintrin.h	4.34 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 limits.h	6.21 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 lwpintrin.h	3.33 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 lzcntintrin.h	2.31 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 mm3dnow.h	6.91 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 mm_malloc.h	1.74 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 mmintrin.h	31.14 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 movdirintrin.h	2.29 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 mwaitintrin.h	1.67 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 mwaitxintrin.h	1.71 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 nmmintrin.h	1.26 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 omp.h	9.97 KB	02/12/2025 01:07:07 PM	rw-r--r--
📄 openacc.h	6.25 KB	02/12/2025 01:07:07 PM	rw-r--r--
📄 pconfigintrin.h	2.3 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 pkuintrin.h	1.7 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 pmmintrin.h	3.92 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 popcntintrin.h	1.71 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 prfchwintrin.h	1.41 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 rdseedintrin.h	1.97 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 rtmintrin.h	2.67 KB	02/12/2025 12:50:26 PM	rw-r--r--
📁 sanitizer	-	04/05/2025 03:47:40 AM	rwxr-xr-x
📄 serializeintrin.h	1.59 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 sgxintrin.h	6.92 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 shaintrin.h	3.13 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 smmintrin.h	27.77 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 stdalign.h	1.18 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 stdarg.h	3.98 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 stdatomic.h	9.14 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 stdbool.h	1.47 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 stddef.h	12.66 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 stdfix.h	5.86 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 stdint-gcc.h	9.32 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 stdint.h	328 bytes	02/12/2025 12:50:26 PM	rw-r--r--
📄 stdnoreturn.h	1.11 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 syslimits.h	330 bytes	02/12/2025 11:32:58 AM	rw-r--r--
📄 tbmintrin.h	5.13 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 tmmintrin.h	8.15 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 tsxldtrkintrin.h	1.74 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 uintrintrin.h	2.25 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 unwind.h	10.65 KB	02/12/2025 01:06:55 PM	rw-r--r--
📄 vaesintrin.h	3.39 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 varargs.h	139 bytes	02/12/2025 12:50:25 PM	rw-r--r--
📄 vpclmulqdqintrin.h	2.66 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 waitpkgintrin.h	1.95 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 wbnoinvdintrin.h	1.59 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 wmmintrin.h	4.55 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 x86gprintrin.h	5.94 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 x86intrin.h	1.27 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 xmmintrin.h	43.37 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 xopintrin.h	28.11 KB	02/12/2025 12:50:25 PM	rw-r--r--
📄 xsavecintrin.h	1.78 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 xsaveintrin.h	2.42 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 xsaveoptintrin.h	1.81 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 xsavesintrin.h	2.11 KB	02/12/2025 12:50:26 PM	rw-r--r--
📄 xtestintrin.h	1.65 KB	02/12/2025 12:50:26 PM	rw-r--r--

Editing: tmmintrin.h

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   any later version.

GCC is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

Under Section 7 of GPL version 3, you are granted additional
   permissions described in the GCC Runtime Library Exception, version
   3.1, as published by the Free Software Foundation.

You should have received a copy of the GNU General Public License and
   a copy of the GCC Runtime Library Exception along with this program;
   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
   <http://www.gnu.org/licenses/>.  */

/* Implemented from the specification included in the Intel C++ Compiler
   User Guide and Reference, version 9.1.  */

#ifndef _TMMINTRIN_H_INCLUDED
#define _TMMINTRIN_H_INCLUDED

/* We need definitions from the SSE3, SSE2 and SSE header files*/
#include <pmmintrin.h>

#ifndef __SSSE3__
#pragma GCC push_options
#pragma GCC target("ssse3")
#define __DISABLE_SSSE3__
#endif /* __SSSE3__ */

extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_hadd_epi16 (__m128i __X, __m128i __Y)
{
  return (__m128i) __builtin_ia32_phaddw128 ((__v8hi)__X, (__v8hi)__Y);
}

extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_hadd_epi32 (__m128i __X, __m128i __Y)
{
  return (__m128i) __builtin_ia32_phaddd128 ((__v4si)__X, (__v4si)__Y);
}

extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_hadds_epi16 (__m128i __X, __m128i __Y)
{
  return (__m128i) __builtin_ia32_phaddsw128 ((__v8hi)__X, (__v8hi)__Y);
}

extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_hadd_pi16 (__m64 __X, __m64 __Y)
{
  return (__m64) __builtin_ia32_phaddw ((__v4hi)__X, (__v4hi)__Y);
}

extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_hadd_pi32 (__m64 __X, __m64 __Y)
{
  return (__m64) __builtin_ia32_phaddd ((__v2si)__X, (__v2si)__Y);
}

extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_hadds_pi16 (__m64 __X, __m64 __Y)
{
  return (__m64) __builtin_ia32_phaddsw ((__v4hi)__X, (__v4hi)__Y);
}

extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_hsub_epi16 (__m128i __X, __m128i __Y)
{
  return (__m128i) __builtin_ia32_phsubw128 ((__v8hi)__X, (__v8hi)__Y);
}

extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_hsub_epi32 (__m128i __X, __m128i __Y)
{
  return (__m128i) __builtin_ia32_phsubd128 ((__v4si)__X, (__v4si)__Y);
}

extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_hsubs_epi16 (__m128i __X, __m128i __Y)
{
  return (__m128i) __builtin_ia32_phsubsw128 ((__v8hi)__X, (__v8hi)__Y);
}

extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_hsub_pi16 (__m64 __X, __m64 __Y)
{
  return (__m64) __builtin_ia32_phsubw ((__v4hi)__X, (__v4hi)__Y);
}

extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_hsub_pi32 (__m64 __X, __m64 __Y)
{
  return (__m64) __builtin_ia32_phsubd ((__v2si)__X, (__v2si)__Y);
}

extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_hsubs_pi16 (__m64 __X, __m64 __Y)
{
  return (__m64) __builtin_ia32_phsubsw ((__v4hi)__X, (__v4hi)__Y);
}

extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_maddubs_epi16 (__m128i __X, __m128i __Y)
{
  return (__m128i) __builtin_ia32_pmaddubsw128 ((__v16qi)__X, (__v16qi)__Y);
}

extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_maddubs_pi16 (__m64 __X, __m64 __Y)
{
  return (__m64) __builtin_ia32_pmaddubsw ((__v8qi)__X, (__v8qi)__Y);
}

extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_mulhrs_epi16 (__m128i __X, __m128i __Y)
{
  return (__m128i) __builtin_ia32_pmulhrsw128 ((__v8hi)__X, (__v8hi)__Y);
}

extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_mulhrs_pi16 (__m64 __X, __m64 __Y)
{
  return (__m64) __builtin_ia32_pmulhrsw ((__v4hi)__X, (__v4hi)__Y);
}

extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_shuffle_epi8 (__m128i __X, __m128i __Y)
{
  return (__m128i) __builtin_ia32_pshufb128 ((__v16qi)__X, (__v16qi)__Y);
}

extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_shuffle_pi8 (__m64 __X, __m64 __Y)
{
  return (__m64) __builtin_ia32_pshufb ((__v8qi)__X, (__v8qi)__Y);
}

extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_sign_epi8 (__m128i __X, __m128i __Y)
{
  return (__m128i) __builtin_ia32_psignb128 ((__v16qi)__X, (__v16qi)__Y);
}

extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_sign_epi16 (__m128i __X, __m128i __Y)
{
  return (__m128i) __builtin_ia32_psignw128 ((__v8hi)__X, (__v8hi)__Y);
}

extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_sign_epi32 (__m128i __X, __m128i __Y)
{
  return (__m128i) __builtin_ia32_psignd128 ((__v4si)__X, (__v4si)__Y);
}

extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_sign_pi8 (__m64 __X, __m64 __Y)
{
  return (__m64) __builtin_ia32_psignb ((__v8qi)__X, (__v8qi)__Y);
}

extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_sign_pi16 (__m64 __X, __m64 __Y)
{
  return (__m64) __builtin_ia32_psignw ((__v4hi)__X, (__v4hi)__Y);
}

extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_sign_pi32 (__m64 __X, __m64 __Y)
{
  return (__m64) __builtin_ia32_psignd ((__v2si)__X, (__v2si)__Y);
}

#ifdef __OPTIMIZE__
extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_alignr_epi8(__m128i __X, __m128i __Y, const int __N)
{
  return (__m128i) __builtin_ia32_palignr128 ((__v2di)__X,
					      (__v2di)__Y, __N * 8);
}

extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_alignr_pi8(__m64 __X, __m64 __Y, const int __N)
{
  return (__m64) __builtin_ia32_palignr ((__v1di)__X,
					 (__v1di)__Y, __N * 8);
}
#else
#define _mm_alignr_epi8(X, Y, N)					\
  ((__m128i) __builtin_ia32_palignr128 ((__v2di)(__m128i)(X),		\
					(__v2di)(__m128i)(Y),		\
					(int)(N) * 8))
#define _mm_alignr_pi8(X, Y, N)						\
  ((__m64) __builtin_ia32_palignr ((__v1di)(__m64)(X),			\
				   (__v1di)(__m64)(Y),			\
				   (int)(N) * 8))
#endif

extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_abs_epi8 (__m128i __X)
{
  return (__m128i) __builtin_ia32_pabsb128 ((__v16qi)__X);
}

extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_abs_epi16 (__m128i __X)
{
  return (__m128i) __builtin_ia32_pabsw128 ((__v8hi)__X);
}

extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_abs_epi32 (__m128i __X)
{
  return (__m128i) __builtin_ia32_pabsd128 ((__v4si)__X);
}

extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_abs_pi8 (__m64 __X)
{
  return (__m64) __builtin_ia32_pabsb ((__v8qi)__X);
}

extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_abs_pi16 (__m64 __X)
{
  return (__m64) __builtin_ia32_pabsw ((__v4hi)__X);
}

extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_abs_pi32 (__m64 __X)
{
  return (__m64) __builtin_ia32_pabsd ((__v2si)__X);
}

#ifdef __DISABLE_SSSE3__
#undef __DISABLE_SSSE3__
#pragma GCC pop_options
#endif /* __DISABLE_SSSE3__ */

#endif /* _TMMINTRIN_H_INCLUDED */